The present disclosure concerns flash storage devices and, more particularly, flash storage devices configured to mitigate read disturb errors.
Flash memory comprises an array of memory cells. Each memory cell includes a floating gate transistor that is used to store one or more bits of data. The floating gate transistor in a memory cell is programmed by placing an amount of charge on the floating gate, which increases the threshold voltage of the transistor. To read the memory cell, a read voltage above the threshold voltage of an unprogrammed transistor and below the threshold voltage of a programmed transistor is applied to the control gate of the transistor. An unprogrammed transistor will conduct at the read. voltage, while a programmed transistor will not. By sensing conduction with the read voltage applied, the programmed state of the transistor may be read.
NAND flash memory is organized into strings of transistors. Each string includes multiple transistors linked together by connecting the source of one transistor to the drain of an adjacent transistor. The strings of transistors typically are organized into physical blocks, each physical block comprising a number of pages. The transistors within a string correspond to different respective p in a physical block. A page is read out of a physical block by applying a read voltage to the control gate of the transistor corresponding to the particular page in each string of the physical block. During a read operation, the other transistors in the strings are operated in a conducting state by placing a voltage at or above the threshold voltage of a programmed transistor on the respective control gates.
Repeated read operations to a physical block may generate bit errors in one or more pages within the physical block. As noted above, transistors not being read are operated in a conducting state during a read operation. The voltage applied to these transistors may transfer a small amount of charge to the transistors' floating gates. After a number of read operations, the cumulative amount of transferred charge may cause a previously unprogrammed transistor to be incorrectly read as a programmed transistor. These errors, referred to as read disturb errors, may result in data loss within physical blocks containing frequently read pages unless the flash memory is managed to mitigate read disturb errors and the potential data toss associated with these errors.